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/**************************************************************************/
/* */
/* Copyright (c) Microsoft Corporation. All rights reserved. */
/* */
/* This software is licensed under the Microsoft Software License */
/* Terms for Microsoft Azure RTOS. Full text of the license can be */
/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
/* and in the root directory of this software. */
/* */
/**************************************************************************/
#include "fx_stm32_sd_driver.h"
TX_SEMAPHORE transfer_semaphore;
extern SD_HandleTypeDef hsd;
extern void MX_SDIO_SD_Init(void);
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/**
* @brief Initializes the SD IP instance
* @param UINT instance SD instance to initialize
* @retval 0 on success error value otherwise
*/
INT fx_stm32_sd_init(UINT instance)
{
INT ret = 0;
/* USER CODE BEGIN PRE_FX_SD_INIT */
UNUSED(instance);
/* USER CODE END PRE_FX_SD_INIT */
#if (FX_STM32_SD_INIT == 1)
MX_SDIO_SD_Init();
#endif
/* USER CODE BEGIN POST_FX_SD_INIT */
/* USER CODE END POST_FX_SD_INIT */
return ret;
}
/**
* @brief Deinitializes the SD IP instance
* @param UINT instance SD instance to deinitialize
* @retval 0 on success error value otherwise
*/
INT fx_stm32_sd_deinit(UINT instance)
{
INT ret = 0;
/* USER CODE BEGIN PRE_FX_SD_DEINIT */
UNUSED(instance);
/* USER CODE END PRE_FX_SD_DEINIT */
if(HAL_SD_DeInit(&hsd) != HAL_OK)
{
ret = 1;
}
/* USER CODE BEGIN POST_FX_SD_DEINIT */
/* USER CODE END POST_FX_SD_DEINIT */
return ret;
}
/**
* @brief Check the SD IP status.
* @param UINT instance SD instance to check
* @retval 0 when ready 1 when busy
*/
INT fx_stm32_sd_get_status(UINT instance)
{
INT ret = 0;
/* USER CODE BEGIN PRE_GET_STATUS */
UNUSED(instance);
/* USER CODE END PRE_GET_STATUS */
if(HAL_SD_GetCardState(&hsd) != HAL_SD_CARD_TRANSFER)
{
ret = 1;
}
/* USER CODE BEGIN POST_GET_STATUS */
/* USER CODE END POST_GET_STATUS */
return ret;
}
/**
* @brief Read Data from the SD device into a buffer.
* @param UINT instance SD IP instance to read from.
* @param UINT *buffer buffer into which the data is to be read.
* @param UINT start_block the first block to start reading from.
* @param UINT total_blocks total number of blocks to read.
* @retval 0 on success error code otherwise
*/
INT fx_stm32_sd_read_blocks(UINT instance, UINT *buffer, UINT start_block, UINT total_blocks)
{
INT ret = 0;
/* USER CODE BEGIN PRE_READ_BLOCKS */
UNUSED(instance);
/* USER CODE END PRE_READ_BLOCKS */
if(HAL_SD_ReadBlocks_DMA(&hsd, (uint8_t *)buffer, start_block, total_blocks) != HAL_OK)
{
ret = 1;
}
/* USER CODE BEGIN POST_READ_BLOCKS */
/* USER CODE END POST_READ_BLOCKS */
return ret;
}
/**
* @brief Write data buffer into the SD device.
* @param UINT instance SD IP instance to write into.
* @param UINT *buffer buffer to write into the SD device.
* @param UINT start_block the first block to start writing into.
* @param UINT total_blocks total number of blocks to write.
* @retval 0 on success error code otherwise
*/
INT fx_stm32_sd_write_blocks(UINT instance, UINT *buffer, UINT start_block, UINT total_blocks)
{
INT ret = 0;
/* USER CODE BEGIN PRE_WRITE_BLOCKS */
UNUSED(instance);
/* USER CODE END PRE_WRITE_BLOCKS */
if(HAL_SD_WriteBlocks_DMA(&hsd, (uint8_t *)buffer, start_block, total_blocks) != HAL_OK)
{
ret = 1;
}
/* USER CODE BEGIN POST_WRITE_BLOCKS */
/* USER CODE END POST_WRITE_BLOCKS */
return ret;
}
/**
* @brief SD DMA Tx Transfer completed callbacks
* @param Instance the sd instance
* @retval None
*/
void HAL_SD_TxCpltCallback(SD_HandleTypeDef *hsd)
{
/* USER CODE BEGIN PRE_TX_CMPLT */
/* USER CODE END PRE_TX_CMPLT */
tx_semaphore_put(&transfer_semaphore);
/* USER CODE BEGIN POST_TX_CMPLT */
/* USER CODE END POST_TX_CMPLT */
}
/**
* @brief SD DMA Rx Transfer completed callbacks
* @param Instance the sd instance
* @retval None
*/
void HAL_SD_RxCpltCallback(SD_HandleTypeDef *hsd)
{
/* USER CODE BEGIN PRE_RX_CMPLT */
/* USER CODE END PRE_RX_CMPLT */
tx_semaphore_put(&transfer_semaphore);
/* USER CODE BEGIN POST_RX_CMPLT */
/* USER CODE END POST_RX_CMPLT */
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */