uint32_t BlockSize;
Location | Referrer | Text |
---|---|---|
stm32f4xx_hal_nand.h:101 | uint32_t BlockSize; /*!< NAND memory block size measured in number of pages */ | |
stm32f4xx_hal_nand.c:546 | HAL_NAND_ConfigDevice() | hnand->Config.BlockSize = pDeviceConfig->BlockSize; |
stm32f4xx_hal_nand.c:603 | HAL_NAND_Read_Page_8b() | nandaddress = ARRAY_ADDRESS(pAddress, hnand); |
stm32f4xx_hal_nand.c:606 | HAL_NAND_Read_Page_8b() | while ((nbpages != 0U) && (nandaddress < ((hnand->Config.BlockSize) * (hnand->Config.BlockNbr)))) |
stm32f4xx_hal_nand.c:615 | HAL_NAND_Read_Page_8b() | if (((hnand->Config.BlockSize) * (hnand->Config.BlockNbr)) <= 65535U) |
stm32f4xx_hal_nand.c:638 | HAL_NAND_Read_Page_8b() | if (((hnand->Config.BlockSize) * (hnand->Config.BlockNbr)) <= 65535U) |
stm32f4xx_hal_nand.c:772 | HAL_NAND_Read_Page_16b() | nandaddress = ARRAY_ADDRESS(pAddress, hnand); |
stm32f4xx_hal_nand.c:775 | HAL_NAND_Read_Page_16b() | while ((nbpages != 0U) && (nandaddress < ((hnand->Config.BlockSize) * (hnand->Config.BlockNbr)))) |
stm32f4xx_hal_nand.c:784 | HAL_NAND_Read_Page_16b() | if (((hnand->Config.BlockSize) * (hnand->Config.BlockNbr)) <= 65535U) |
stm32f4xx_hal_nand.c:807 | HAL_NAND_Read_Page_16b() | if (((hnand->Config.BlockSize) * (hnand->Config.BlockNbr)) <= 65535U) |
stm32f4xx_hal_nand.c:955 | HAL_NAND_Write_Page_8b() | nandaddress = ARRAY_ADDRESS(pAddress, hnand); |
stm32f4xx_hal_nand.c:958 | HAL_NAND_Write_Page_8b() | while ((nbpages != 0U) && (nandaddress < ((hnand->Config.BlockSize) * (hnand->Config.BlockNbr)))) |
stm32f4xx_hal_nand.c:969 | HAL_NAND_Write_Page_8b() | if (((hnand->Config.BlockSize) * (hnand->Config.BlockNbr)) <= 65535U) |
stm32f4xx_hal_nand.c:992 | HAL_NAND_Write_Page_8b() | if (((hnand->Config.BlockSize) * (hnand->Config.BlockNbr)) <= 65535U) |
stm32f4xx_hal_nand.c:1119 | HAL_NAND_Write_Page_16b() | nandaddress = ARRAY_ADDRESS(pAddress, hnand); |
stm32f4xx_hal_nand.c:1122 | HAL_NAND_Write_Page_16b() | while ((nbpages != 0U) && (nandaddress < ((hnand->Config.BlockSize) * (hnand->Config.BlockNbr)))) |
stm32f4xx_hal_nand.c:1133 | HAL_NAND_Write_Page_16b() | if (((hnand->Config.BlockSize) * (hnand->Config.BlockNbr)) <= 65535U) |
stm32f4xx_hal_nand.c:1156 | HAL_NAND_Write_Page_16b() | if (((hnand->Config.BlockSize) * (hnand->Config.BlockNbr)) <= 65535U) |
stm32f4xx_hal_nand.c:1299 | HAL_NAND_Read_SpareArea_8b() | nandaddress = ARRAY_ADDRESS(pAddress, hnand); |
stm32f4xx_hal_nand.c:1305 | HAL_NAND_Read_SpareArea_8b() | while ((nbspare != 0U) && (nandaddress < ((hnand->Config.BlockSize) * (hnand->Config.BlockNbr)))) |
stm32f4xx_hal_nand.c:1314 | HAL_NAND_Read_SpareArea_8b() | if (((hnand->Config.BlockSize) * (hnand->Config.BlockNbr)) <= 65535U) |
stm32f4xx_hal_nand.c:1341 | HAL_NAND_Read_SpareArea_8b() | if (((hnand->Config.BlockSize) * (hnand->Config.BlockNbr)) <= 65535U) |
stm32f4xx_hal_nand.c:1475 | HAL_NAND_Read_SpareArea_16b() | nandaddress = ARRAY_ADDRESS(pAddress, hnand); |
stm32f4xx_hal_nand.c:1481 | HAL_NAND_Read_SpareArea_16b() | while ((nbspare != 0U) && (nandaddress < ((hnand->Config.BlockSize) * (hnand->Config.BlockNbr)))) |
stm32f4xx_hal_nand.c:1490 | HAL_NAND_Read_SpareArea_16b() | if (((hnand->Config.BlockSize) * (hnand->Config.BlockNbr)) <= 65535U) |
stm32f4xx_hal_nand.c:1517 | HAL_NAND_Read_SpareArea_16b() | if (((hnand->Config.BlockSize) * (hnand->Config.BlockNbr)) <= 65535U) |
stm32f4xx_hal_nand.c:1651 | HAL_NAND_Write_SpareArea_8b() | nandaddress = ARRAY_ADDRESS(pAddress, hnand); |
stm32f4xx_hal_nand.c:1657 | HAL_NAND_Write_SpareArea_8b() | while ((nbspare != 0U) && (nandaddress < ((hnand->Config.BlockSize) * (hnand->Config.BlockNbr)))) |
stm32f4xx_hal_nand.c:1668 | HAL_NAND_Write_SpareArea_8b() | if (((hnand->Config.BlockSize) * (hnand->Config.BlockNbr)) <= 65535U) |
stm32f4xx_hal_nand.c:1697 | HAL_NAND_Write_SpareArea_8b() | if (((hnand->Config.BlockSize) * (hnand->Config.BlockNbr)) <= 65535U) |
stm32f4xx_hal_nand.c:1825 | HAL_NAND_Write_SpareArea_16b() | nandaddress = ARRAY_ADDRESS(pAddress, hnand); |
stm32f4xx_hal_nand.c:1831 | HAL_NAND_Write_SpareArea_16b() | while ((nbspare != 0U) && (nandaddress < ((hnand->Config.BlockSize) * (hnand->Config.BlockNbr)))) |
stm32f4xx_hal_nand.c:1842 | HAL_NAND_Write_SpareArea_16b() | if (((hnand->Config.BlockSize) * (hnand->Config.BlockNbr)) <= 65535U) |
stm32f4xx_hal_nand.c:1871 | HAL_NAND_Write_SpareArea_16b() | if (((hnand->Config.BlockSize) * (hnand->Config.BlockNbr)) <= 65535U) |
stm32f4xx_hal_nand.c:1991 | HAL_NAND_Erase_Block() | *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_1ST_CYCLE(ARRAY_ADDRESS(pAddress, hnand)); |
stm32f4xx_hal_nand.c:1993 | HAL_NAND_Erase_Block() | *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_2ND_CYCLE(ARRAY_ADDRESS(pAddress, hnand)); |
stm32f4xx_hal_nand.c:1995 | HAL_NAND_Erase_Block() | *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_3RD_CYCLE(ARRAY_ADDRESS(pAddress, hnand)); |
stm32f4xx_hal_nand.c:2032 | HAL_NAND_Address_Inc() | if (pAddress->Page == hnand->Config.BlockSize) |