HAL + 0/9 examples
CodeScope will show references to MPU_Region_InitTypeDef::IsCacheable from the following samples and libraries:
Examples
STM32446E_EVAL
Examples
Cortex
STM32469I_EVAL
Examples
Cortex
STM324x9I_EVAL
Examples
Cortex
STM324xG_EVAL
Examples
Cortex
STM32F412G-Discovery
Examples
Cortex
STM32F412ZG-Nucleo
Examples
Cortex
STM32F413ZH-Nucleo
Examples
Cortex
STM32F429ZI-Nucleo
Examples
Cortex
STM32F446ZE-Nucleo
Examples
Cortex
 
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CodeScopeSTM32 Libraries and SamplesHALMPU_Region_InitTypeDef::IsCacheable

MPU_Region_InitTypeDef::IsCacheable field

Specifies the cacheable status of the region protected. This parameter can be a value of CORTEX_MPU_Access_Cacheable

Syntax

uint8_t IsCacheable;

Examples

MPU_Region_InitTypeDef::IsCacheable is referenced by 9 libraries and example projects.

References

LocationReferrerText
stm32f4xx_hal_cortex.h:65
uint8_t IsCacheable; /*!< Specifies the cacheable status of the region protected.
stm32f4xx_hal_cortex.c:314HAL_MPU_ConfigRegion()
assert_param(IS_MPU_ACCESS_CACHEABLE(MPU_Init->IsCacheable));
stm32f4xx_hal_cortex.c:324HAL_MPU_ConfigRegion()
((uint32_t)MPU_Init->IsCacheable << MPU_RASR_C_Pos) |

Data Use

Functions reading MPU_Region_InitTypeDef::IsCacheable
MPU_Region_InitTypeDef::IsCacheable
all items filtered out
Type of MPU_Region_InitTypeDef::IsCacheable
MPU_Region_InitTypeDef::IsCacheable
uint8_t
all items filtered out