OpenOCD
xtensa::target is only used within OpenOCD.
 
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CodeScopeDevelopment ToolsOpenOCDxtensa::target

xtensa::target field

Syntax

struct target *target;

References

LocationReferrerText
xtensa.h:263
struct target *target;
xtensa.c:435xtensa_core_reg_get()
struct target *target = xtensa->target;
xtensa.c:453xtensa_core_reg_set()
struct target *target = xtensa->target;
xtensa.c:543xtensa_queue_exec_ins_wide()
target_buffer_get_u32(xtensa->target, &ops_padded[sizeof(uint32_t) * i]));
xtensa.c:547xtensa_queue_exec_ins_wide()
target_buffer_get_u32(xtensa->target, &ops_padded[0]));
xtensa.c:565xtensa_region_ar_exec()
xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_DDR, XT_REG_A3));
xtensa.c:566xtensa_region_ar_exec()
xtensa_queue_exec_ins(xtensa, XT_INS_PPTLB(xtensa, XT_REG_A3, XT_REG_A3));
xtensa.c:567xtensa_region_ar_exec()
xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa, XT_SR_DDR, XT_REG_A3));
xtensa.c:605xtensa_window_state_save()
xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, woe_sr, XT_REG_A3));
xtensa.c:606xtensa_window_state_save()
xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa, XT_SR_DDR, XT_REG_A3));
xtensa.c:620xtensa_window_state_save()
xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_DDR, XT_REG_A3));
xtensa.c:621xtensa_window_state_save()
xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa, woe_sr, XT_REG_A3));
xtensa.c:634xtensa_window_state_restore()
xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_DDR, XT_REG_A3));
xtensa.c:635xtensa_window_state_restore()
xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa, woe_sr, XT_REG_A3));
xtensa.c:701xtensa_write_dirty_registers()
xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_DDR, XT_REG_A3));
xtensa.c:705xtensa_write_dirty_registers()
xtensa_queue_exec_ins(xtensa, XT_INS_WUR(xtensa, reg_num, XT_REG_A3));
xtensa.c:707xtensa_write_dirty_registers()
xtensa_queue_exec_ins(xtensa, XT_INS_WFR(xtensa, reg_num, XT_REG_A3));
xtensa.c:713xtensa_write_dirty_registers()
xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa, reg_num, XT_REG_A3));
xtensa.c:716xtensa_write_dirty_registers()
xtensa_queue_exec_ins(xtensa, XT_INS_JX(xtensa, XT_REG_A3));
xtensa.c:726xtensa_write_dirty_registers()
xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa, reg_num, XT_REG_A3));
xtensa.c:740xtensa_write_dirty_registers()
xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_DDR, XT_REG_A3));
xtensa.c:741xtensa_write_dirty_registers()
xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa,
xtensa.c:750xtensa_write_dirty_registers()
xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa, XT_SR_DDR, XT_REG_A3));
xtensa.c:809xtensa_write_dirty_registers()
xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_DDR, i));
xtensa.c:838xtensa_write_dirty_registers()
XT_INS_RSR(xtensa, XT_SR_DDR,
xtensa.c:852xtensa_write_dirty_registers()
xtensa_queue_exec_ins(xtensa, XT_INS_ROTW(xtensa, rotw_arg));
xtensa.c:864xtensa_write_dirty_registers()
xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_DDR, XT_REG_A3));
xtensa.c:865xtensa_write_dirty_registers()
xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa, ms_regno, XT_REG_A3));
xtensa.c:871xtensa_write_dirty_registers()
xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_DDR, XT_REG_A3));
xtensa.c:936xtensa_smpbreak_write()
LOG_TARGET_DEBUG(xtensa->target, "write smpbreak set=0x%" PRIx32 " clear=0x%" PRIx32, set, clear);
xtensa.c:1237xtensa_fetch_all_regs()
xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa, XT_SR_DDR, XT_REG_A3));
xtensa.c:1241xtensa_fetch_all_regs()
xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa, XT_SR_DDR, XT_REG_A0));
xtensa.c:1249xtensa_fetch_all_regs()
xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, ms_regno, XT_REG_A3));
xtensa.c:1250xtensa_fetch_all_regs()
xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa, XT_SR_DDR, XT_REG_A3));
xtensa.c:1254xtensa_fetch_all_regs()
xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_DDR, XT_REG_A3));
xtensa.c:1255xtensa_fetch_all_regs()
xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa, ms_regno, XT_REG_A3));
xtensa.c:1272xtensa_fetch_all_regs()
XT_INS_WSR(xtensa, XT_SR_DDR, xtensa_regs[XT_REG_IDX_AR0 + i].reg_num));
xtensa.c:1285xtensa_fetch_all_regs()
xtensa_queue_exec_ins(xtensa, XT_INS_ROTW(xtensa, rotw_arg));
xtensa.c:1292xtensa_fetch_all_regs()
xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, xtensa_regs[XT_REG_IDX_CPENABLE].reg_num, XT_REG_A3));
xtensa.c:1293xtensa_fetch_all_regs()
xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa, XT_SR_DDR, XT_REG_A3));
xtensa.c:1314xtensa_fetch_all_regs()
xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_DDR, XT_REG_A3));
xtensa.c:1315xtensa_fetch_all_regs()
xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa, xtensa_regs[XT_REG_IDX_CPENABLE].reg_num, XT_REG_A3));
xtensa.c:1331xtensa_fetch_all_regs()
xtensa_queue_exec_ins(xtensa, XT_INS_RUR(xtensa, reg_num, XT_REG_A3));
xtensa.c:1334xtensa_fetch_all_regs()
xtensa_queue_exec_ins(xtensa, XT_INS_RFR(xtensa, reg_num, XT_REG_A3));
xtensa.c:1341xtensa_fetch_all_regs()
xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, reg_num, XT_REG_A3));
xtensa.c:1344xtensa_fetch_all_regs()
xtensa_queue_exec_ins(xtensa, XT_INS_CALL0(xtensa, 0));
xtensa.c:1345xtensa_fetch_all_regs()
xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa, XT_SR_DDR, XT_REG_A0));
xtensa.c:1354xtensa_fetch_all_regs()
xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, reg_num, XT_REG_A3));
xtensa.c:1360xtensa_fetch_all_regs()
xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, reg_num, XT_REG_A3));
xtensa.c:1367xtensa_fetch_all_regs()
xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa, XT_SR_DDR, XT_REG_A3));
xtensa.c:1663xtensa_do_resume()
xtensa_queue_exec_ins(xtensa, XT_INS_RFDO(xtensa));
xtensa.c:1711xtensa_pc_in_winexc()
xtensa_insn_t masked = insn & XT_INS_L32E_S32E_MASK(xtensa);
xtensa.c:1712xtensa_pc_in_winexc()
if (masked == XT_INS_L32E(xtensa, 0, 0, 0) || masked == XT_INS_S32E(xtensa, 0, 0, 0))
xtensa.c:1715xtensa_pc_in_winexc()
masked = insn & XT_INS_RFWO_RFWU_MASK(xtensa);
xtensa.c:1716xtensa_pc_in_winexc()
if (masked == XT_INS_RFWO(xtensa) || masked == XT_INS_RFWU(xtensa))
xtensa.c:2007xtensa_read_memory()
bool bswap = xtensa->target->endianness == TARGET_BIG_ENDIAN;
xtensa.c:2034xtensa_read_memory()
xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_DDR, XT_REG_A3));
xtensa.c:2037xtensa_read_memory()
xtensa_queue_exec_ins(xtensa, XT_INS_LDDR32P(xtensa, XT_REG_A3));
xtensa.c:2045xtensa_read_memory()
xtensa_queue_exec_ins(xtensa, XT_INS_L32I(xtensa, XT_REG_A3, XT_REG_A4, 0));
xtensa.c:2046xtensa_read_memory()
xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa, XT_SR_DDR, XT_REG_A4));
xtensa.c:2049xtensa_read_memory()
xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_DDR, XT_REG_A3));
xtensa.c:2122xtensa_write_memory()
if (xtensa->target->endianness == TARGET_BIG_ENDIAN)
xtensa.c:2146xtensa_write_memory()
xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_DDR, XT_REG_A3));
xtensa.c:2148xtensa_write_memory()
xtensa_queue_exec_ins(xtensa, XT_INS_LDDR32P(xtensa, XT_REG_A3));
xtensa.c:2150xtensa_write_memory()
xtensa_queue_exec_ins(xtensa, XT_INS_L32I(xtensa, XT_REG_A3, XT_REG_A3, 0));
xtensa.c:2151xtensa_write_memory()
xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa, XT_SR_DDR, XT_REG_A3));
xtensa.c:2157xtensa_write_memory()
xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_DDR, XT_REG_A3));
xtensa.c:2159xtensa_write_memory()
xtensa_queue_exec_ins(xtensa, XT_INS_LDDR32P(xtensa, XT_REG_A3));
xtensa.c:2161xtensa_write_memory()
xtensa_queue_exec_ins(xtensa, XT_INS_L32I(xtensa, XT_REG_A3, XT_REG_A3, 0));
xtensa.c:2162xtensa_write_memory()
xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa, XT_SR_DDR, XT_REG_A3));
xtensa.c:2176xtensa_write_memory()
if (xtensa->target->endianness == TARGET_BIG_ENDIAN) {
xtensa.c:2196xtensa_write_memory()
if (xtensa->target->endianness == TARGET_BIG_ENDIAN)
xtensa.c:2201xtensa_write_memory()
xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_DDR, XT_REG_A3));
xtensa.c:2207xtensa_write_memory()
xtensa_queue_exec_ins(xtensa, XT_INS_SDDR32P(xtensa, XT_REG_A3));
xtensa.c:2216xtensa_write_memory()
xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_DDR, XT_REG_A4));
xtensa.c:2217xtensa_write_memory()
xtensa_queue_exec_ins(xtensa, XT_INS_S32I(xtensa, XT_REG_A3, XT_REG_A4, 0));
xtensa.c:2219xtensa_write_memory()
xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_DDR, XT_REG_A3));
xtensa.c:2259xtensa_write_memory()
xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_DDR, XT_REG_A3));
xtensa.c:2262xtensa_write_memory()
xtensa_queue_exec_ins(xtensa, XT_INS_IHI(xtensa, XT_REG_A3, off));
xtensa.c:2264xtensa_write_memory()
xtensa_queue_exec_ins(xtensa, XT_INS_DHWBI(xtensa, XT_REG_A3, off));
xtensa.c:2401xtensa_poll()
xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_DDR, XT_REG_A3));
xtensa.c:2402xtensa_poll()
xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa, XT_SR_PS, XT_REG_A3));
xtensa.c:2459xtensa_update_instruction()
xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_DDR, XT_REG_A3));
xtensa.c:2463xtensa_update_instruction()
xtensa_queue_exec_ins(xtensa, XT_INS_DHWBI(xtensa, XT_REG_A3, 0));
xtensa.c:2468xtensa_update_instruction()
xtensa_queue_exec_ins(xtensa, XT_INS_DHWBI(xtensa, XT_REG_A3, 4));
xtensa.c:2472xtensa_update_instruction()
xtensa_queue_exec_ins(xtensa, XT_INS_IHI(xtensa, XT_REG_A3, 0));
xtensa.c:2477xtensa_update_instruction()
xtensa_queue_exec_ins(xtensa, XT_INS_IHI(xtensa, XT_REG_A3, 4));
xtensa.c:2500xtensa_update_instruction()
xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_DDR, XT_REG_A3));
xtensa.c:2501xtensa_update_instruction()
xtensa_queue_exec_ins(xtensa, XT_INS_DHWB(xtensa, XT_REG_A3, 0));
xtensa.c:2505xtensa_update_instruction()
xtensa_queue_exec_ins(xtensa, XT_INS_DHWB(xtensa, XT_REG_A3, 4));
xtensa.c:2531xtensa_sw_breakpoint_add()
uint32_t break_insn = sw_bp->insn_sz == XT_ISNS_SZ_MAX ? XT_INS_BREAK(xtensa, 0, 0) : XT_INS_BREAKN(xtensa, 0);
xtensa.c:3207xtensa_gdbqc_qxtreg()
xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_DDR, XT_REG_A4));
xtensa.c:3213xtensa_gdbqc_qxtreg()
xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_DDR, XT_REG_A4));
xtensa.c:3380xtensa_init_arch_info()
xtensa->target = target;
xtensa.c:3563xtensa_cmd_exe_do()
xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_DDR, XT_REG_A3));
xtensa.c:3564xtensa_cmd_exe_do()
xtensa_queue_exec_ins(xtensa, XT_INS_WSR(xtensa,
xtensa.c:3567xtensa_cmd_exe_do()
xtensa_queue_exec_ins(xtensa, XT_INS_RSR(xtensa, XT_SR_DDR, XT_REG_A3));
xtensa_fileio.c:61xtensa_fileio_detect_proc()
if (buf_get_u32(brk_insn_buf, 0, 32) != XTENSA_SYSCALL(xtensa))

Data Use

Type of xtensa::target
xtensa::target
all items filtered out