swd_seq_dormant_to_jtag variable

Dormant-to-JTAG sequence. This is at least 8 TCK/SWCLK cycles with TMS/SWDIO high to abort any ongoing selection alert sequence, followed by a specific 128-bit selection alert sequence, followed by 4 TCK/SWCLK cycles with TMS/SWDIO low, followed by a specific protocol-dependent activation code. For JTAG there are two possible activation codes: - "JTAG-Serial": 12 bits 0x00, 0x00 - "Arm CoreSight JTAG-DP": 8 bits 0x0a We use "JTAG-Serial" only, which seams more generic. Since the target TAP can be either in Run/Test Idle or in Test-Logic-Reset states, Arm recommends to put the TAP in Run/Test Idle using one TCK cycle with TMS low. To keep the sequence length multiple of 8, 8 TCK cycle with TMS low are sent (allowed by JTAG state machine). Bits are stored (and transmitted) LSB-first.