OpenOCD
armv7a_common::armv7a_mmu is only used within OpenOCD.
 
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CodeScopeDevelopment ToolsOpenOCDarmv7a_common::armv7a_mmu

armv7a_common::armv7a_mmu field

Syntax

struct armv7a_mmu_common armv7a_mmu;

References

LocationReferrerText
armv7a.h:111
struct armv7a_mmu_common armv7a_mmu;
armv7a.c:140armv7a_read_ttbcr()
armv7a->armv7a_mmu.ttbcr = ttbcr;
armv7a.c:141armv7a_read_ttbcr()
armv7a->armv7a_mmu.cached = 1;
armv7a.c:147armv7a_read_ttbcr()
&armv7a->armv7a_mmu.ttbr[ttbidx]);
armv7a.c:156armv7a_read_ttbcr()
armv7a->armv7a_mmu.ttbr_range[0] = 0xffffffff >> ttbcr_n;
armv7a.c:157armv7a_read_ttbcr()
armv7a->armv7a_mmu.ttbr_range[1] = 0xffffffff;
armv7a.c:158armv7a_read_ttbcr()
armv7a->armv7a_mmu.ttbr_mask[0] = 0xffffffff << (14 - ttbcr_n);
armv7a.c:159armv7a_read_ttbcr()
armv7a->armv7a_mmu.ttbr_mask[1] = 0xffffffff << 14;
armv7a.c:160armv7a_read_ttbcr()
armv7a->armv7a_mmu.cached = 1;
armv7a.c:169armv7a_read_ttbcr()
armv7a->armv7a_mmu.ttbr_mask[0] = 7 << (32 - ttbcr_n);
armv7a.c:174armv7a_read_ttbcr()
armv7a->armv7a_mmu.ttbr_mask[0],
armv7a.c:175armv7a_read_ttbcr()
armv7a->armv7a_mmu.ttbr_mask[1]);
armv7a.c:194armv7a_l2x_cache_init()
if (armv7a->armv7a_mmu.armv7a_cache.outer_cache)
armv7a.c:196armv7a_l2x_cache_init()
armv7a->armv7a_mmu.armv7a_cache.outer_cache = l2x_cache;
armv7a.c:203armv7a_l2x_cache_init()
if (armv7a->armv7a_mmu.armv7a_cache.outer_cache)
armv7a.c:205armv7a_l2x_cache_init()
armv7a->armv7a_mmu.armv7a_cache.outer_cache = l2x_cache;
armv7a.c:374armv7a_identify_cache()
&(armv7a->armv7a_mmu.armv7a_cache);
armv7a.c:474armv7a_identify_cache()
if (!armv7a->armv7a_mmu.armv7a_cache.flush_all_data_cache) {
armv7a.c:475armv7a_identify_cache()
armv7a->armv7a_mmu.armv7a_cache.flush_all_data_cache =
armv7a.c:479armv7a_identify_cache()
armv7a->armv7a_mmu.armv7a_cache.info = 1;
armv7a.c:525armv7a_init_arch_info()
armv7a->armv7a_mmu.armv7a_cache.info = -1;
armv7a.c:526armv7a_init_arch_info()
armv7a->armv7a_mmu.armv7a_cache.outer_cache = NULL;
armv7a.c:527armv7a_init_arch_info()
armv7a->armv7a_mmu.armv7a_cache.flush_all_data_cache = NULL;
armv7a.c:549armv7a_arch_state()
state[armv7a->armv7a_mmu.armv7a_cache.d_u_cache_enabled],
armv7a.c:550armv7a_arch_state()
state[armv7a->armv7a_mmu.armv7a_cache.i_cache_enabled]);
armv7a.c:553armv7a_arch_state()
state[armv7a->armv7a_mmu.mmu_enabled],
armv7a.c:554armv7a_arch_state()
state[armv7a->armv7a_mmu.armv7a_cache.d_u_cache_enabled],
armv7a.c:555armv7a_arch_state()
state[armv7a->armv7a_mmu.armv7a_cache.i_cache_enabled]);
armv7a_cache.c:30armv7a_l1_d_cache_sanity_check()
if (!armv7a->armv7a_mmu.armv7a_cache.d_u_cache_enabled) {
armv7a_cache.c:48armv7a_l1_i_cache_sanity_check()
if (!armv7a->armv7a_mmu.armv7a_cache.i_cache_enabled) {
armv7a_cache.c:90armv7a_l1_d_cache_clean_inval_all()
struct armv7a_cache_common *cache = &(armv7a->armv7a_mmu.armv7a_cache);
armv7a_cache.c:151armv7a_l1_d_cache_inval_virt()
struct armv7a_cache_common *armv7a_cache = &armv7a->armv7a_mmu.armv7a_cache;
armv7a_cache.c:215armv7a_l1_d_cache_clean_virt()
struct armv7a_cache_common *armv7a_cache = &armv7a->armv7a_mmu.armv7a_cache;
armv7a_cache.c:259armv7a_l1_d_cache_flush_virt()
struct armv7a_cache_common *armv7a_cache = &armv7a->armv7a_mmu.armv7a_cache;
armv7a_cache.c:341armv7a_l1_i_cache_inval_virt()
&armv7a->armv7a_mmu.armv7a_cache;
armv7a_cache.c:399arm7a_l1_cache_info_cmd()
&armv7a->armv7a_mmu.armv7a_cache);
armv7a_cache_l2x.c:25arm7a_l2x_sanity_check()
(armv7a->armv7a_mmu.armv7a_cache.outer_cache);
armv7a_cache_l2x.c:46arm7a_l2x_flush_all_data()
(armv7a->armv7a_mmu.armv7a_cache.outer_cache);
armv7a_cache_l2x.c:66armv7a_l2x_cache_flush_virt()
(armv7a->armv7a_mmu.armv7a_cache.outer_cache);
armv7a_cache_l2x.c:101armv7a_l2x_cache_inval_virt()
(armv7a->armv7a_mmu.armv7a_cache.outer_cache);
armv7a_cache_l2x.c:136armv7a_l2x_cache_clean_virt()
(armv7a->armv7a_mmu.armv7a_cache.outer_cache);
armv7a_cache_l2x.c:190armv7a_l2x_cache_init()
if (armv7a->armv7a_mmu.armv7a_cache.outer_cache) {
armv7a_cache_l2x.c:198armv7a_l2x_cache_init()
armv7a->armv7a_mmu.armv7a_cache.outer_cache = l2x_cache;
armv7a_cache_l2x.c:206armv7a_l2x_cache_init()
if (armv7a->armv7a_mmu.armv7a_cache.outer_cache) {
armv7a_cache_l2x.c:210armv7a_l2x_cache_init()
armv7a->armv7a_mmu.armv7a_cache.outer_cache = l2x_cache;
armv7a_cache_l2x.c:227arm7a_l2x_cache_info_command()
&armv7a->armv7a_mmu.armv7a_cache);
armv7a_mmu.c:190armv7a_mmu_dump_table()
struct armv7a_mmu_common *mmu = &armv7a->armv7a_mmu;
cortex_a.c:1120cortex_a_post_debug_entry()
if (armv7a->armv7a_mmu.armv7a_cache.info == -1)
cortex_a.c:1124cortex_a_post_debug_entry()
armv7a->armv7a_mmu.mmu_enabled = 0;
cortex_a.c:1126cortex_a_post_debug_entry()
armv7a->armv7a_mmu.mmu_enabled =
cortex_a.c:1129cortex_a_post_debug_entry()
armv7a->armv7a_mmu.armv7a_cache.d_u_cache_enabled =
cortex_a.c:1131cortex_a_post_debug_entry()
armv7a->armv7a_mmu.armv7a_cache.i_cache_enabled =
cortex_a.c:3119cortex_a_init_arch_info()
armv7a->armv7a_mmu.read_physical_memory = cortex_a_read_phys_memory;
cortex_a.c:3216cortex_a_mmu()
*enabled = target_to_cortex_a(target)->armv7a_common.armv7a_mmu.mmu_enabled;
cortex_a.c:3253cortex_a_handle_cache_info_command()
&armv7a->armv7a_mmu.armv7a_cache);

Data Use

Type of armv7a_common::armv7a_mmu
armv7a_common::armv7a_mmu
all items filtered out