MSP430 large code, restricted data Timing Benchmarks

Target Platform: ti.platforms.msp430:MSP430F5438A:1

Tool Chain Version: 16.9.0

BIOS Version: bios_6_52_00_11_eng

XDCTools Version: xdctools_3_50_03_33_core

Benchmark	Cycles
Interrupt Latency	241
Hwi_restore()	5
Hwi_disable()	3
Hwi dispatcher prolog	110
Hwi dispatcher epilog	123
Hwi dispatcher	245
Hardware Interrupt to Blocked Task	628
Hardware Interrupt to Software Interrupt	395
Swi_enable()	71
Swi_disable()	18
Post Software Interrupt Again	33
Post Software Interrupt without Context Switch	140
Post Software Interrupt with Context Switch	340
Create a New Task without Context Switch	7928
Set a Task Priority without a Context Switch	233
Task_yield()	329
Post Semaphore No Waiting Task	68
Post Semaphore No Task Switch	281
Post Semaphore with Task Switch	404
Pend on Semaphore No Context Switch	107
Pend on Semaphore with Task Switch	471
Clock_getTicks()	18
POSIX Create a New Task without Context Switch	11606
POSIX Set a Task Priority without a Context Switch	302
POSIX Post Semaphore No Waiting Task	77
POSIX Post Semaphore No Task Switch	290
POSIX Post Semaphore with Task Switch	413
POSIX Pend on Semaphore No Context Switch	116
POSIX Pend on Semaphore with Task Switch	480

The benchmark application was built using BIOS.LibType_Custom with the following BIOS.customCCOpts settings: “-vmspx –near_data=none –code_model=large –data_model=restricted -q –advice:power=1 –program_level_compile -o3”.

See the SYS/BIOS User’s Guide for more information regarding how interrupt latency is calculated.