C28x large model Timing Benchmarks

Target Platform: ti.platforms.tms320x28:TMS320F280049M:1

Tool Chain Version: 16.9.1

BIOS Version: bios_6_52_00_11_eng

XDCTools Version: xdctools_3_50_03_33_core

Benchmark	Cycles
Interrupt Latency	158
Hwi_restore()	18
Hwi_disable()	15
Hwi dispatcher prolog	202
Hwi dispatcher epilog	152
Hwi dispatcher	354
Hardware Interrupt to Blocked Task	572
Hardware Interrupt to Software Interrupt	418
Swi_enable()	87
Swi_disable()	12
Post Software Interrupt Again	32
Post Software Interrupt without Context Switch	117
Post Software Interrupt with Context Switch	227
Create a New Task without Context Switch	3341
Set a Task Priority without a Context Switch	182
Task_yield()	230
Post Semaphore No Waiting Task	48
Post Semaphore No Task Switch	197
Post Semaphore with Task Switch	275
Pend on Semaphore No Context Switch	70
Pend on Semaphore with Task Switch	321
Clock_getTicks()	12
POSIX Create a New Task without Context Switch	5955
POSIX Set a Task Priority without a Context Switch	238
POSIX Post Semaphore No Waiting Task	60
POSIX Post Semaphore No Task Switch	205
POSIX Post Semaphore with Task Switch	287
POSIX Pend on Semaphore No Context Switch	79
POSIX Pend on Semaphore with Task Switch	331

The benchmark application was built using BIOS.LibType_Custom with the following BIOS.customCCOpts settings: “-v28 -DLARGE_MODEL=1 -ml -mo –program_level_compile -o3”.

Runtime performance was optimized by reducing CPU clock speed to eliminate flash wait states.

The C28x targets also supports zero latency interrupts. See ti.sysbios.family.c28.Hwi cdocs for details.

See the SYS/BIOS User’s Guide for more information regarding how interrupt latency is calculated.